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? 2002 microchip technology inc. ds21458b-page 1 tc7126/a features ? internal reference with low temperature drift - tc7126: 80ppm/c typical - tc7126a: 35ppm/c typical zero reading with zero input low noise: 15v p-p high resolution: 0.05% low input leakage current: 1pa typ., 10pa max. precision null detectors with true polarity at zero high-impedance differential input convenient 9v battery operation with low power dissipation: 500 wtyp.,900 wmax. applications thermometry bridge readouts: strain gauges, load cells, null detectors digital meters and panel meters: - voltage/current/ohms/power, ph digital scales, process monitors device selection table general description the tc7126a is a 3-1/2 digit cmos analog-to-digital converter (adc) containing all the active components necessary to construct a 0.05% resolution measure- ment system. seven-segment decoders, digit and polarity drivers, voltage reference, and clock circuit are integrated on-chip. the tc7126a directly drives a liq- uid crystal display (lcd), and includes a backplane driver. a low cost, high resolution indicating meter requires only a display, four resistors, and four capacitors. the tc7126a's extremely low power drain and 9v battery operation make it ideal for portable applications. the tc7126a reduces linearity error to less than 1 count. rollover error (the difference in readings for equal magnitude, but opposite polarity input signals) is below 1 count. high-impedance differential inputs offer 1pa leakage current and a 10 12 ? input imped- ance. the 15 v p-p noise performance ensures a "rock solid" reading, and the auto-zero cycle ensures a zero display reading with a 0v input. the tc7126a features a precision, low drift internal voltage reference and is functionally identical to the tc7126. a low drift external reference is not normally required with the tc7126a. package code package temperature range cpl 40-pin pdip 0 cto+70 c ipl 40-pin pdip (tc7126 only) -25 cto+85 c ckw 44-pin pqfp 0 cto+70 c clw 44-pin plcc 0 cto+70 c 3-1/2 digit analog-to-digital converters
tc7126/a ds21458b-page 2 ? 2002 microchip technology inc. package type tc7126cpl tc7126acpl tc7126ipl tc7126aipl 1 2 3 4 osc1 5 6 7 8 9 10 11 12 test v ref + analog common c az v+ d 2 normal pin configuration reverse pin configuration 13 14 15 16 17 18 19 20 40 39 38 37 36 35 34 33 32 31 30 29 28 27 26 25 24 23 22 21 c 2 b 2 a 2 f 2 e 2 d 3 b 3 f 3 e 3 ab 4 10's 100's 1000's 100's osc2 osc3 v ref - c ref + c ref - v in + v in - v buff v int v- g 2 c 3 a 3 g 3 bp (backplane) pol (minus sign) tc7126rcpl tc7126arcpl TC7126RIPL tc7126aripl 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 100's 1000's 100's 40 39 38 37 36 35 34 33 32 31 30 29 28 27 26 25 24 23 22 21 d 1 c 1 b 1 a 1 f 1 g 1 e 1 1's v+ d 2 c 2 b 2 a 2 f 2 e 2 d 3 b 3 f 3 e 3 ab 4 pol (minus sign) d 1 c 1 b 1 a 1 f 1 g 1 e 1 1's 10's osc1 test v ref + analog common c az osc2 osc3 v ref - c ref + c ref - v in + v in - v buff v int v- g 2 c 3 a 3 g 3 bp (backplane) nc = no internal connection 27 28 29 30 31 32 33 7 4 3 2 1 nc tc7126ckw tc7126ackw 12 13 14 15 17 18 g 2 44 43 42 41 39 38 40 analog common 16 37 c az 36 v buff 35 v int 34 v- 19 20 21 22 d 3 26 8 25 9 24 10 23 11 5 6 c 3 osc3 test nc nc v+ d 2 c 2 b 2 a 2 f 2 e 2 nc osc2 osc1 c ref + c ref - a 3 g 3 bp pol ab 4 e 3 f 3 b 3 33 34 35 36 37 38 39 13 10 9 8 7 analog common v ref - 18 19 20 21 23 24 ab 4 pol nc bp nc b 2 6543 144 2 a 1 osc1 22 43 osc2 42 osc3 41 test 40 25 26 27 28 f 3 e 3 g 3 a 3 c 3 g 2 32 14 c az 31 15 v buff 30 16 v int e 2 29 17 d 3 nc 11 12 nc c 2 d 2 f 2 a 2 b 3 tc7126clw tc7126aclw v- b 1 c 1 d 1 v+ f 1 g 1 e 1 d 1 c 1 b 1 a 1 f 1 g 1 e 1 c ref + c ref - v in + v in - v ref + v ref + v ref - v in + v in - 44-pin pqfp 44-pin pdip (reverse) 44-pin plcc 40-pin pdip (normal)
? 2002 microchip technology inc. ds21458b-page 3 tc7126/a typical application v ref + tc7126 tc7126a 33 34 240k ? 10k ? 31 29 39 38 40 v ref - 0.33 f 0.1 f v- osc1 osc3 osc2 to analog common (pin 32) 1 conversion/sec c osc 560k ? 180k ? 0.15 f 0.01 f analog input + ? c ref - c ref + v in + v in - analog common v int v buff c az 20 21 1 segment drive 2?19 22?25 pol bp v+ minus sign backplane 28 50pf lcd 1m ? 27 30 32 35 36 9v + r osc 26 note: pin numbers refer to 40-pin dip.
tc7126/a ds21458b-page 4 ? 2002 microchip technology inc. functional block diagram tc7126a thousands hundreds tens units 4 39 osc2 v+ test 1 to switch drivers from comparator output clock 40 38 osc3 osc1 control logic 26 500 ? data latch c ref - r int v+ c az v int 28 29 27 33 36 34 10 a 31 zi & az int az & de () 32 int 26 integrator to digital section de (+) de ( ? ) de (+) de ( ? ) analog common c ref + v in + v in - v buff c int v ref +v ref - zi & az c ref + 35 + ? lcd segment drivers bp f osc v- v th = 1v v- + ? low temp co v ref comparator ? az zi v+ ? 2.8v 1 r osc c osc 7-segment decode 7-segment decode 7-segment decode 21 typical segment output internal digital ground segment output v+ 0.5ma 2ma 6.2v lcd + ? 200
? 2002 microchip technology inc. ds21458b-page 5 tc7126/a 1.0 electrical characteristics absolute maximum ratings* supply voltage (v+ to v-)....................................... 15v analog input voltage (either input) (note 1) ... v+ to v- reference input voltage (either input) ............ v+ to v- clock input ................................................... test to v+ package power dissipation (t a 70c) (note 2) : 44-pin pqfp............................................... 1.00w 40-pin plcc ............................................... 1.23w 44-pin pdip ................................................ 1.23w operating temperature range: c (commercial) devices .................. 0c to +70c i (industrial) devices .................... -25c to +85c storage temperature range .............. -65c to +150c *stresses above those listed under "absolute maximum ratings" may cause permanent damage to the device. these are stress ratings only and functional operation of the device at these or any other conditions above those indicated in the operation sections of the specifications is not implied. exposure to absolute maximum rating conditions for extended periods may affect device reliability. tc7126/a electrical specifications electrical characteristics: v s =+9v,f clk ? 16khz, and t a = +25c, unless otherwise noted. symbol parameter min typ max unit test conditions input z ir zero input reading -000.0 000.0 +000.0 digital reading v in =0v full scale = 200mv z rd zero reading drift ? 0.2 1 v/c v in =0v,0c t a +70c ratiometric reading 999 999/1000 1000 digital reading v in =v ref ,v ref =100mv nl linearity error -1 0.2 1 count full scale = 200mv or 2v max deviation from best fit straight line rollover error -1 0.2 1 count v in -=v in + 200mv e n noise ? 15 ? v p-p v in = 0v, full scale = 200mv i l input leakage current ? 1 10 pa v in =0v cmrr common mode rejection ratio ? 50 ? v/v v cm =1v,v in =0v full scale = 200mv scale factor temperature coefficient ?1 5ppm/cv in =199mv,0c t a +70c ext. ref. temp coeff. = 0ppm/c analog common v ctc analog common temperature coefficient ? ? ? ? 250k ? between common and v+ ?? ? ?0c t a +70c ("c" devices) ? 80 ? ppm/c tc7126 ? 35 75 ppm/c tc7126a ? 35 100 ppm/c -25c t a +85c ("i" device) (tc7126a) v c analog common voltage 2.7 3.05 3.35 v 250k ? between common and v+ note 1: input voltages may exceed the supply voltages, provided the input current is limited to 100 a. 2: dissipation rating assumes device is mounted with all leads soldered to printed circuit board. 3: refer to ?differential input? discussion. 4: backplane drive is in phase with segment drive for ?off? segment, 180 out of phase for ?on? segment. frequency is 20 times conversion rate. average dc component is less than 50mv. 5: see ?typical application?. 6: during auto-zero phase, current is 10-20 a higher. a 48khz ocillator increases current by 8 a (typical). common current is not included.
tc7126/a ds21458b-page 6 ? 2002 microchip technology inc. lcd drive v sd lcd segment drive voltage 4 5 6 v p-p v+ to v- = 9v v bd lcd backplane drive voltage 4 5 6 v p-p v+ to v- = 9v power supply i s power supply current ? 55 100 av in = 0v, v+ to v- = 9v (note 6) tc7126/a electrical specifications (continued) electrical characteristics: v s =+9v,f clk ? 16khz, and t a = +25c, unless otherwise noted. symbol parameter min typ max unit test conditions note 1: input voltages may exceed the supply voltages, provided the input current is limited to 100 a. 2: dissipation rating assumes device is mounted with all leads soldered to printed circuit board. 3: refer to ?differential input? discussion. 4: backplane drive is in phase with segment drive for ?off? segment, 180 out of phase for ?on? segment. frequency is 20 times conversion rate. average dc component is less than 50mv. 5: see ?typical application?. 6: during auto-zero phase, current is 10-20 a higher. a 48khz ocillator increases current by 8 a (typical). common current is not included.
? 2002 microchip technology inc. ds21458b-page 7 tc7126/a 2.0 pin descriptions the descriptions of the pins are listed in table 2-1. table 2-1: pin function table pin number (40-pin pdip) normal (reversed) symbol description 1 (40) v+ positive supply voltage. 2(39)d 1 activates the d section of the units display. 3(38)c 1 activates the c section of the units display. 4(37)b 1 activates the b section of the units display. 5(36)a 1 activates the a section of the units display. 6(35)f 1 activates the f section of the units display. 7(34)g 1 activates the g section of the units display. 8(33)e 1 activates the e section of the units display. 9(32)d 2 activates the d section of the tens display. 10 (31) c 2 activates the c section of the tens display. 11 (30) b 2 activates the b section of the tens display. 12 (29) a 2 activates the a section of the tens display. 13 (28) f 2 activates the f section of the tens display. 14 (27) e 2 activates the e section of the tens display. 15 (26) d 3 activates the d section of the hundreds display. 16 (25) b 3 activates the b section of the hundreds display. 17 (24) f 3 activates the f section of the hundreds display. 18 (23) e 3 activates the e section of the hundreds display. 19 (22) ab 4 activates both halves of the 1 in the thousands display. 20 (21) pol activates the negative polarity display. 21 (20) bp lcd backplane drive output (tc7106a). digital ground (tc7107a). 22 (19) g 3 activates the g section of the hundreds display. 23 (18) a 3 activates the a section of the hundreds display. 24 (17) c 3 activates the c section of the hundreds display. 25 (16) g 2 activates the g section of the tens display. 26 (15) v- negative power supply voltage. 27 (14) v int the integrating capacitor should be selected to give the maximum voltage swing that ensures component tolerance buildup will not allow the integrator output to saturate. when analog common is used as a reference and the conversion rate is 3 readings per second, a 0.047 f capacitor may be used. the capacitor must have a low dielectric constant to prevent rollover errors. see section 6.3, integrating capacitor for additional details. 28 (13) v buff integration resistor connection. use a 180k ? resistor for a 200mv full-scale range anda1.8m ? resistor for a 2v full scale range. 29 (12) c az the size of the auto-zero capacitor influences system noise. use a 0.33 f capacitor for 200mv full scale, and a 0.033 f capacitor for 2v full scale. see section 6.1, auto-zero capacitor for additional details. 30 (11) v in - the analog low input is connected to this pin. 31 (10) v in + the analog high input signal is connected to this pin. 32 (9) analog common this pin is primarily used to set the analog common mode voltage for battery opera- tion, or in systems where the input signal is referenced to the power supply. it also acts as a reference voltage source. see section 7.3, analog common for additional details. 33 (8) c ref - see pin 34.
tc7126/a ds21458b-page 8 ? 2002 microchip technology inc. 34 (7) c ref +a0.1 f capacitor is used in most applications. if a large common mode voltage exists (for example, the v in - pin is not at analog common) and a 200mv scale is used, a 1 f capacitor is recommended and will hold the rollover error to 0.5 count. 35 (6) v ref - see pin 36. 36 (5) v ref + the analog input required to generate a full scale output (1999 counts). place 100mv between pins 35 and 36 for 199.9mv full scale. place 1v between pins 35 and 36 for 2v full scale. see section 6.6, reference voltage for additional information. 37 (4) test lamp test. when pulled high (to v+), all segments will be turned on and the display should read -1888 . it may also be used as a negative supply for externally generated decimal points. see section 7.4, test for additional information. 38 (3) osc3 see pin 40. 39 (2) osc2 see pin 40. 40 (1) osc1 pins 40, 39 and 38 make up the oscillator section. for a 48khz clock (3 readings, 39 per second), connect pin 40 to the junction of a 180k ? resistor and a 50pf capacitor. the 180k ? resistor is tied to pin 39 and the 50pf capacitor is tied to pin 38. table 2-1: pin function table (continued) pin number (40-pin pdip) normal (reversed) symbol description
? 2002 microchip technology inc. ds21458b-page 9 tc7126/a 3.0 detailed description (all pin designations refer to 40-pin pdip.) 3.1 dual slope conversion principles the tc7126a is a dual slope, integrating analog-to- digital converter. an understanding of the dual slope conversion technique will aid in following the detailed tc7126/a operation theory. the conventional dual slope converter measurement cycle has two distinct phases: input signal integration reference voltage integration (de-integration) the input signal being converted is integrated for a fixed time period (t si ). time is measured by counting clock pulses. an opposite polarity constant reference voltage is then integrated until the integrator output voltage returns to zero. the reference integration time is directly proportional to the input signal (t ri )(seefigure3-1). figure 3-1: basic dual slope converter in a simple dual slope converter, a complete conver- sion requires the integrator output to ?ramp-up? and ?ramp-down.? a simple mathematical equation relates the input sig- nal, reference voltage and integration time : equation 3-1: for a constant v in : equation 3-2: the dual slope converter accuracy is unrelated to the integrating resistor and capacitor values, as long as they are stable during a measurement cycle. noise immunity is an inherent benefit. noise spikes are inte- grated or averaged to zero during integration periods. integrating adcs are immune to the large conversion errors that plague successive approximation converters in high noise environments. interfering signals with fre- quency components at multiples of the averaging period will be attenuated. integrating adcs commonly operate with the signal integration period set to a multiple of the 50hz/60hz power line period (see figure 3-2). figure 3-2: normal mode rejection of dual slope converter + ? ref voltage analog input signal + ? display switch driver control logic integrator output clock counter polarity control phase control v in v ref v in 1.2 v ref variable reference integrate time fixed signal integrate time integrator comparator where: v r = reference voltage t si = signal integration time (fixed) t ri = reference voltage integration time (variable) 1 rc t si 0 v in (t)d t = v r t ri rc v in v r t ri t si ------- = 30 20 10 0 normal mode rejection (db) 0.1/t 1/t 10/t input fre q uenc y t = measurement period
tc7126/a ds21458b-page 10 ? 2002 microchip technology inc. 4.0 analog section in addition to the basic integrate and de-integrate dual slope cycles discussed above, the tc7126a design incorporates an auto-zero cycle. this cycle removes buffer amplifier, integrator and comparator offset volt- age error terms from the conversion. a true digital zero reading results without external adjusting potentiome- ters. a complete conversion consists of three phases: 1. auto-zero phase 2. signal integrate phase 3. reference integrate phase 4.1 auto-zero phase during the auto-zero phase, the differential input signal is disconnected from the circuit by opening internal analog gates. the internal nodes are shorted to analog common (ground) to establish a zero input condition. additional analog gates close a feedback loop around the integrator and comparator. this loop permits com- parator offset voltage error compensation. the voltage level established on c az compensates for device offset voltages. the auto-zero phase residual is typically 10 vto15 v. the auto-zero cycle length is 1000 to 3000 clock periods. 4.2 signal integrate phase the auto-zero loop is entered and the internal differen- tial inputs connect to v in + and v in -. the differential input signal is integrated for a fixed time period. the tc7126/a signal integration period is 1000 clock periods or counts. the externally set clock frequency is divided by four before clocking the internal counters. the integration time period is: equation 4-1: the differential input voltage must be within the device common mode range when the converter and mea- sured system share the same power supply common (ground). if the converter and measured system do not share the same power supply common, v in - should be tied to analog common. polarity is determined at the end of signal integrate phase. the sign bit is a true polarity indication, in that signals less than 1lsb are correctly determined. this allows precision null detection limited only by device noise and auto-zero residual offsets. 4.3 reference integrate phase the third phase is reference integrate or de-integrate. v in - is internally connected to analog common and v in + is connected across the previously charged reference capacitor. circuitry within the chip ensures that the capacitor will be connected with the correct polarity to cause the integrator output to return to zero. the time required for the output to return to zero is proportional to the input signal and is between 0 and 2000 counts. the digital reading displayed is: equation 4-2: 5.0 digital section the tc7126a contains all the segment drivers neces- sary to directly drive a 3-1/2 digit lcd, including an lcd backplane driver. the backplane frequency is the external clock frequency divided by 800. for 3 conver- sions per second, the backplane frequency is 60hz with a 5v nominal amplitude. when a segment driver is in phase with the backplane signal, the segment is off. an out of phase segment drive signal causes the segment to be on (visible). this ac drive configuration results in negligible dc voltage across each lcd seg- ment, ensuring long lcd life. the polarity segment driver is on for negative analog inputs. if v in +andv in - are reversed, this indicator reverses. on the tc7126a, when the test pin is pulled to v+, all segments are turned on and the display reads -1888 . during this mode, lcd segments have a constant dc voltage impressed. the display font and segment drive assignment are showninfigure5-1. figure 5-1: display font and segment assignment t si = 4 f osc x 1000 where: f osc = external clock frequency. note: do not leave the display in this mode for more than several minutes. lcds may be destroyed if operated with dc levels for extended periods. v in v ref 1000 display font 1000's 100's 10's 1's
? 2002 microchip technology inc. ds21458b-page 11 tc7126/a 5.1 system timing the oscillator frequency is divided by four prior to clocking the internal decade counters. the four-phase measurement cycle takes a total of 4000 counts (16,000 clock pulses). the 4000-count cycle is inde- pendent of input signal magnitude. each phase of the measurement cycle has the following length: 1. auto-zero phase: 1000 to 3000 counts (4000 to 12,000 clock pulses). for signals less than full scale, the auto-zero phase is assigned the unused reference integrate time period. 2. signal integrate: 1000 counts (4000 clock pulses). this time period is fixed. the integration period is: equation 5-1: 3. reference integrate: 0 to 2000 counts (0 to 8000 clock pulses). the tc7126a is a drop-in replacement for the tc7126 and icl7126, which offer a greatly improved internal reference temperature coefficient. no external compo- nent value changes are required to upgrade existing designs. 6.0 component value selection 6.1 auto-zero capacitor (c az ) the c az capacitor size has some influence on system noise. a 0.47 f capacitor is recommended for 200mv full scale applications where 1lsb is 100 v. a 0.033f capacitor is adequate for 2.0v full scale applications. a mylar type dielectric capacitor is adequate. 6.2 reference voltage capacitor (c ref ) the reference voltage, used to ramp the integrator out- put voltage back to zero during the reference integrate phase, is stored on c ref .a0.1 f capacitor is accept- able when v ref - is tied to analog common. if a large common mode voltage exists (v ref - ? analog com- mon) and the application requires a 200mv full scale, increase c ref to 1 f. rollover error will be held to less than 0.5 count. a mylar type dielectric capacitor is adequate. 6.3 integrating capacitor (c int ) c int should be selected to maximize integrator output voltage swing without causing output saturation. due to the tc7126a's superior analog common temperature coefficient specification, analog common will normally supply the differential voltage reference. for this case, a 2v full scale integrator output swing is satisfactory. for 3 readings per second (f osc = 48khz), a 0.047 f value is suggested. for 1 reading per second, 0.15 f is recommended. if a different oscillator frequency is used, c int must be changed in inverse proportion to maintain the nominal 2v integrator swing. an exact expression for c int is: equation 6-1: at 3 readings per second, a 750 ? resistor should be placed in series with c int . this increases accuracy by compensating for comparator delay. c int must have low dielectric absorption to minimize rollover error. a polypropylene capacitor is recommended. 6.4 integrating resistor (r int ) the input buffer amplifier and integrator are designed with class a output stages. the output stage idling cur- rent is 6a. the integrator and buffer can supply 1a drive current with negligible linearity errors. r int is cho- sen to remain in the output stage linear drive region, but not so large that pc board leakage currents induce errors. for a 200mv full scale, r int is 180k ? .a2vfull scale requires 1.8m ? . note: f osc = 48khz (3 readings per sec). t si = 4000 1 f osc where: f osc is the externally set clock frequency. component value nominal full scale voltage 200mv 2v c az 0.33 f 0.033 f r int 180k ? 1.8m ? c int 0.047 f 0.047 f c int = (4000) 1 f osc v fs r int ? ? ? ? ? ? ? ? v int where: f osc = clock frequency at pin 38 v fs = full scale input voltage r int = integrating resistor v int = desired full scale integrator output swing
tc7126/a ds21458b-page 12 ? 2002 microchip technology inc. 6.5 oscillator components c osc should be 50pf; r osc is selected from the equation: equation 6-2: for a 48khz clock (3 conversions per second), r = 180k ? . note that f osc is 44 to generate the tc7126a's inter- nal clock. the backplane drive signal is derived by dividing f osc by 800. to achieve maximum rejection of 60hz noise pickup, the signal integrate period should be a multiple of 60hz. oscillator frequencies of 24khz, 12khz, 80khz, 60khz, 40khz, etc. should be selected. for 50hz rejec- tion, oscillator frequencies of 20khz, 100khz, 66-2/3khz, 50khz, 40khz, etc. would be suitable. note that 40khz (2.5 readings per second) will reject both 50hz and 60hz. 6.6 reference voltage selection a full scale reading (2000 counts) requires the input signal be twice the reference voltage. note: v fs =2v ref . in some applications, a scale factor other than unity may exist between a transducer output voltage and the required digital reading. assume, for example, a pres- sure transducer output for 2000lb/in 2 is 400mv. rather than dividing the input voltage by two, the reference voltage should be set to 200mv. this permits the trans- ducer input to be used directly. thedifferentialreferencecanalsobeusedwherea digital zero reading is required when v in is not equal to zero. this is common in temperature measuring instru- mentation. a compensating offset voltage can be applied between analog common and v in -. the trans- ducer output is connected between v in + and analog common. 7.0 device pin functional description (pin numbers refer to the 40-pin pdip.) 7.1 differential signal inputs v in +(pin31),v in -(pin30) the tc7126a is designed with true differential inputs and accepts input signals within the input stage common mode voltage range (v cm ). typical range is v+ ? 1v to v- + 1v. common mode voltages are removed from the system when the tc7126a operates from a battery or floating power source (isolated from measured system), and v in - is connected to analog common (v com )(seefigure7-2). in systems where common mode voltages exist, the tc7126a's 86 db common mode rejection ratio mini- mizes error. common mode voltages do, however, affect the integrator output level. a worst case condition exists if a large positive v cm exists in conjunction with a full scale negative differential signal. the negative signal drives the integrator output positive along with v cm (see figure 7-1). for such applications, the inte- grator output swing can be reduced below the recom- mended 2v full scale swing. the integrator output will swing within 0.3v of v+ or v- without increased linearity error. figure 7-1: common mode voltage reduces available integrator swing (v com v in ) required full scale voltage* v ref 20mv 100mv 2v 1v f osc = 0.45 rc r i + ? v in c i integrator v i = [ [ v cm ? v in input buffer c i = integration capacitor r i = integration resistor 4000 f osc t i = integration time = where: v i ? + ? + t i r i c i v cm
? 2002 microchip technology inc. ds21458b-page 13 tc7126/a 7.2 differential reference v ref +(pin36),v ref -(pin35) the reference voltage can be generated anywhere within the v+ to v- power supply range. to prevent rollover type errors being induced by large common mode voltages, c ref should be large com- pared to stray node capacitance. the tc7126a offers a significantly improved analog common temperature coefficient. this potential pro- vides a very stable voltage, suitable for use as a refer- ence. the temperature coefficient of analog common is typically 35ppm/ c for the tc7126a and 80 ppm/ cfor the tc7126. figure 7-2: common mode voltage removed in battery operation with v in = analog common 7.3 analogcommon(pin32) the analog common pin is set at a voltage potential approximately 3v below v+. the potential is between 2.7v and 3.35v below v+. analog common is tied inter- nally to an n-channel fet capable of sinking 100 a. this fet will hold the common line at 3v should an external load attempt to pull the common line toward v+. analog common source current is limited to 1 a. therefore, analog common is easily pulled to a more negative voltage (i.e., below v+ ? 3v). the tc7126a connects the internal v in +andv in - inputs to analog common during the auto-zero phase. during the reference integrate phase, v in - is con- nected to analog common. if v in - is not externally con- nected to analog common, a common mode voltage exists, but is rejected by the converter's 86db com- mon mode rejection ratio. in battery operation, analog common and v in - are usually connected, removing common mode voltage concerns. in systems where v in - is connected to power supply ground or to a given voltage, analog common should be connected to v in -. the analog common pin serves to set the analog sec- tion reference, or common point. the tc7126a is spe- cifically designed to operate from a battery, or in any measurement system where input signals are not refer- enced (float) with respect to the tc7126a's power source. the analog common potential of v+ ? 3v gives a 7v end of battery life voltage. the common potential has a 0.001%/% voltage coefficient and a 15 ? output impedance. with sufficiently high total supply voltage (v+ ? v- > 7v), analog common is a very stable potential with excellent temperature stability (typically 35ppm/ c). this poten- tial can be used to generate the tc7126a's reference voltage. an external voltage reference will be unneces- sary in most cases because of the 35ppm/ c tempera- ture coefficient. see section 7.5, tc7126a internal voltage reference discussion. 7.4 test (pin 37) the test pin potential is 5v less than v+. test may be used as the negative power supply connection for external cmos logic. the test pin is tied to the inter- nally generated negative logic supply through a 500 ? resistor. the test pin load should be no more than 1ma. see section 5.0, digital section for additional information on using test as a negative digital logic supply. i f test is pulled high (to v+), all segments plus the minus sign will be activated. do not operate in this mode for more than several minutes. with test = v+, the lcd segments are impressed with a dc voltage which will destroy the lcd. v buff c az v int bp pol segment drive osc1 osc3 osc2 v- v+ v ref + v ref - analog common v- v+ v- v+ gnd gnd measured system power source 9v lcd tc7126a + v in - v in +
tc7126/a ds21458b-page 14 ? 2002 microchip technology inc. 7.5 tc7126a internal voltage reference the tc7126a's analog common voltage temperature stability has been significantly improved (figure 7-3). the "a" version of the industry standard tc7126 device allows users to upgrade old systems and design new systems, without external voltage references. external r and c values do not need to be changed. figure 7-4 shows analog common supplying the necessary voltage reference for the tc7126a. figure 7-3: analog common temp. coefficient figure 7-4: tc7126a internal voltage reference connection 8.0 typical applications 8.1 liquid crystal display sources several manufacturers supply standard lcds to inter- face with the tc7126a, 3-1/2 digit analog-to-digital converter. note: contact lcd manufacturer for full product listing/ specifications. 8.2 decimal point and annunciator drive the test pin is connected to the internally generated digital logic supply ground through a 500 ? resistor. the test pin may be used as the negative supply for exter- nal cmos gate segment drivers. lcd annunciators for decimal points, low battery indication, or function indi- cation may be added, without adding an additional sup- ply. no more than 1ma should be supplied by the test pin; its potential is approximately 5v below v+ (see figure 8-1). figure 8-1: decimal point and annunciator drives typical maximum typical typical 200 180 160 140 120 100 80 60 40 20 0 analog commom temperature coefficient (ppm/ c) tc7126a icl7136 no maximum specified no maximum specified icl7126 v- analog common tc7126a v ref + 32 35 36 26 240k ? ? v ref - v ref 1 + 9v set v ref = 1/2 v ref v+ manufacturer address/phone representative part numbers* crystaloid electronics 5282 hudson dr. hudson, oh 44236 216-655-2429 c5335, h5535, t5135, sx440 and 720 palomar ave. sunnyvale, ca 94086 408-523-8200 fe 0801 fe 0203 vgi, inc. 1800 vernon st., ste. 2 roseville, ca 95678 916-783-7878 ld-b709bz ld-h7992az hamlin, inc. 612 e. lake st. lake mills, wi 53551 414-648-2361 3902, 3933, 3903 tc7126a v+ v+ test gnd 4030 bp tc7126a bp test 37 21 v+ v+ gnd to lcd decimal point to lcd decimal point to lcd decimal point to backplane 4049 multiple decimal point or annunciator driver simple inverter for fixed decimal point or display annunciator
? 2002 microchip technology inc. ds21458b-page 15 tc7126/a 8.3 flat package thetc7126isavailableinanepoxy64-pinformed lead package. a test socket for the tc7126acbq device is available: part number: ic 51-42 manufacturer: yamaichi distribution: nepenthe distribution 2471 east bayshore, ste. 520 palo alto, ca 94043 (650) 856-9332 8.4 ratiometric resistance measurements the tc7126a ? s true differential input and differential reference make ratiometric reading possible. in a ratio- metric operation, an unknown resistance is measured with respect to a known standard resistance. no accurately defined reference voltage is needed. the unknown resistance is put in series with a known standard and a current passed through the pair. the voltage developed across the unknown is applied to the input and the voltage across the known resistor is applied to the reference input. if the unknown equals the standard, the display will read 1000. the displayed reading can be determined from the following expression: equation 8-1: the display will over range for r unknown 2x r standard (see figure 8-2). figure 8-2: low parts count ratiometric resistance measurement figure 8-3: 3-1/2 digit true rms ac dmm displayed (reading) = r unknown r standard x 1000 v ref + v ref - v in + v in - analog common tc7126a lcd r standard r unknown v+ 8 14 7 13 12 11 10 9 1 2 3 4 5 6 tc7126a 9v + v in 9m ? 900k ? 90k ? 10k ? 2v 20v 200v 200mv 1n4148 10m ? 1m ? 0.02 f 1m ? 10% 47k ? 1 ? 10% 20k ? 10% 6.8 f 1 f com c1 = 3pf to 10pf, variable c2 = 132pf, variable + + ad636 2.2 f 0.01 f 10k ? 240k ? segment drive lcd 39 40 28 27 38 29 26 1 35 32 31 30 26 36 bp v+ v- v ref + v ref - analog common v in + v out + v- c1 c2
tc7126/a ds21458b-page 16 ? 2002 microchip technology inc. figure 8-4: integrated circuit temperature sensor figure 8-5: temperature sensor figure 8-6: positive temperature coefficient resistor temperature sensor tc7126a ? + 9v v+ 2 6 8 3 nc gnd 4 temperature dependent output 3 5 4 1 2 ref02 adj v out temp constant 5v 51k ? 1/2 lm358 v out = 1.86v @ +25 c r 1 50k ? 50k ? r 2 common v in - v in + v ref - v ref + v- v+ 51k ? r 4 r 5 tc7126a v+ v- v in - v in + v ref + v ref - common 50k ? r 2 160k ? 300k ? 300k ? r 1 50k ? 1n4148 sensor 9v + tc7126a v+ v- v in - v in + v ref + v ref - common 5.6k ? 160k ? r 2 20k ? 1n4148 9v r 1 20k ? + r 3 0.7%/ c ptc
? 2002 microchip technology inc. ds21458b-page 17 tc7126/a 9.0 packaging information 9.1 package marking information package marking data not available at this time. 9.2 taping form pin 1 component taping orientation for 44-pin plcc devices user direction of feed standard reel component orientation for tr suffix device note: drawing does not represent total number of pins. w p package carrier width (w) pitch (p) part per full reel reel size 44-pin plcc 32 mm 24 mm 500 13 in carrier tape, number of components per reel and reel size component taping orientation for 44-pin pqfp devices user direction of feed pin 1 standard reel component orientation for tr suffix device w p package carrier width (w) pitch (p) part per full reel reel size 44-pin pqfp 24 mm 16 mm 500 13 in carrier tape, number of components per reel and reel size note: drawing does not represent total number of pins.
tc7126/a ds21458b-page 18 ? 2002 microchip technology inc. 9.3 package dimensions dimensions: inches (mm) 2.065 (52.45) 2.027 (51.49) .200 (5.08) .140 (3.56) .150 (3.81) .115 (2.92) .070 (1.78) .045 (1.14) .022 (0.56) .015 (0.38) .110 (2.79) .090 (2.29) .555 (14.10) .530 (13.46) .610 (15.49) .590 (14.99) .015 (0.38) .008 (0.20) .700 (17.78) .610 (15.50) .040 (1.02) .020 (0.51) 40-pin pdip (wide) pin 1 3 min. dimensions: inches (mm) .695 (17.65) .685 (17.40) .656 (16.66) .650 (16.51) .656 (16.66) .650 (16.51) .021 (0.53) .013 (0.33) .032 (0.81) .026 (0.66) .630 (16.00) .591 (15.00) .120 (3.05) .090 (2.29) .180 (4.57) .165 (4.19) .695 (17.65) .685 (17.40) .050 (1.27) typ. .020 (0.51) min. pin 1 44-pin plcc
? 2002 microchip technology inc. ds21458b-page 19 tc7126/a 9.3 package dimensions (continued) dimensions: inches (mm) .557 (14.15) .537 (13.65) .398 (10.10) .390 (9.90) .031 (0.80) typ. .018 (0.45) .012 (0.30) .398 (10.10) .390 (9.90) .010 (0.25) typ. .096 ( 2.45 ) max. .557 (14.15) .537 (13.65) .083 (2.10) .075 (1.90) .041 (1.03) .026 (0.65) 7 max. .009 (0.23) .005 (0.13) 44-pin pqfp pin 1
tc7126/a ds21458b-page 20 ? 2002 microchip technology inc. product identification system to order or obtain information, e.g., on pricing or delivery, refer to the factory or the listed sales office. sales and support data sheets products supported by a preliminary data sheet may have an errata sheet describing minor operational differences and recom- mended workarounds. to determine if an errata sheet exists for a particular device, please contact one of the following: 1. your local microchip sales office 2. the microchip corporate literature center u.s. fax: (480) 792-7277 3. the microchip worldwide site (www.microchip.com) please specify which device, revision of silicon and data sheet (include literature #) you are using. new customer notification system register on our web site (www.microchip.com/cn) to receive the most current information on our products. part code tc7126x x xxx a or blank* r (reversed pins) or blank (cpl pkg only) * "a" parts have an improved reference tc package code (see device selection table)
? 2002 microchip technology inc. ds21458b-page 21 tc7126/a information contained in this publication regarding device applications and the like is intended through suggestion only and may be superseded by updates. it is your responsibility to ensure that your application meets with your specifications. no representation or warranty is given and no liability is assumed by microchip technology incorporated with respect to the accuracy or use of such information, or infringement of patents or other intellectual property rights arising from such use or otherwise. use of microchip ? sproductsascriticalcom- ponents in life support systems is not authorized except with express written approval by microchip. no licenses are con- veyed, implicitly or otherwise, under any intellectual property rights. trademarks the microchip name and logo, the microchip logo, filterlab, k ee l oq ,microid, mplab,pic,picmicro,picmaster, picstart, pro mate, seeval and the embedded control solutions company are registered trademarks of microchip tech- nology incorporated in the u.s.a. and other countries. dspic, economonitor, fansense, flexrom, fuzzylab, in-circuit serial programming, icsp, icepic, microport, migratable memory, mpasm, mplib, mplink, mpsim, mxdev, picc, picdem, picdem.net, rfpic, select mode and total endurance are trademarks of microchip technology incorporated in the u.s.a. serialized quick turn programming (sqtp) is a service mark of microchip technology incorporated in the u.s.a. all other trademarks mentioned herein are property of their respective companies. ? 2002, microchip technology incorporated, printed in the u.s.a., all rights reserved. printed on recycled paper. microchip received qs-9000 quality system certification for its worldwide headquarters, design and wafer fabrication facilities in chandler and tempe, arizona in july 1999 and mountain view, california in march 2002. the company?s quality system processes and procedures are qs-9000 compliant for its picmicro ? 8-bit mcus, k ee l oq ? code hopping devices, serial eeproms, microperipherals, non-volatile memory and analog products. in addition, microchip?s quality system for the design and manufacture of development systems is iso 9001 certified.
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